A 3-phase full converter has VLL 400 V and α 60°. Find ideal Vdc.
A 540 V
B 400 V
C -270 V
D 270 V
Answer: D. 270 V. With continuous DC current and no overlap, Vdc is about 1.35 VLL cos α; 1.35 times 400 times 0.5 is 270 V.
A full converter has VLL 400 V and α 120°. What is ideal average Vdc?
A -270 V
B 270 V
C 540 V
D -540 V
Answer: A. -270 V. The ideal average is 1.35 VLL cos α. Cosine of 120 degrees is negative one half, giving about -270 V.
What is needed for line-commutated inverter operation?
A DC source and extinction margin
B Resistive load only
C Zero firing delay
D A diode output bridge
Answer: A. DC source and extinction margin. Inverter operation needs an active DC-side source, firing beyond 90 degrees and enough extinction angle for thyristor recovery.
For buck CCM boundary, D 0.5, R 20 Ω, fs 20 kHz. Find Lcrit.
A 125 µH
B 500 µH
C 250 µH
D 1 mH
Answer: C. 250 µH. The ideal buck boundary inductance is (1-D)R divided by 2fs; substituting gives 250 microhenries.
For boost CCM boundary, D 0.5, R 20 Ω, fs 20 kHz. Find Lcrit.
A 125 µH
B 62.5 µH
C 250 µH
D 500 µH
Answer: B. 62.5 µH. For an ideal boost, Lcrit equals D(1-D) squared R divided by 2fs; the values give 62.5 microhenries.
A full bridge outputs a square wave of ±Vdc. What is its fundamental peak?
A 2Vdc divided by π
B 4Vdc divided by π
C Vdc divided by π
D πVdc divided by 4
Answer: B. 4Vdc divided by π. The fundamental component of a bipolar square wave with levels plus and minus Vdc has peak amplitude 4Vdc divided by π.
How many switching states exist in a two-level three-phase inverter?
A Eight states
B Four states
C Six states
D Twelve states
Answer: A. Eight states. Three inverter legs each have two states, giving 2 cubed or eight switching states.
How many active space vectors does a two-level inverter have?
A Two active vectors
B Four active vectors
C Six active vectors
D Eight active vectors
Answer: C. Six active vectors. A two-level three-phase inverter has six nonzero active vectors and two zero vectors.
What mainly causes dead-time voltage error polarity?
A Carrier amplitude
B DC-link capacitance
C Load current direction
D Gate supply isolation
Answer: C. Load current direction. Which antiparallel diode conducts during dead time depends on current direction, so the voltage error changes polarity with current.
What defines zero-voltage switching?
A Turn-off at zero current
B Turn-on at zero voltage
C Turn-on at peak current
D Turn-off at peak voltage
Answer: B. Turn-on at zero voltage. In ZVS, the device voltage is brought close to zero before the device is turned on.
What defines zero-current switching?
A Commutation at zero current
B Turn-on at zero voltage
C Turn-off at peak current
D Switching at zero frequency
Answer: A. Commutation at zero current. In ZCS, the device current is brought close to zero at the switching transition.
Why can soft switching reduce switching loss?
A Less voltage-current overlap
B No conduction current
C No gate-drive power
D Higher blocking voltage
Answer: A. Less voltage-current overlap. Soft switching arranges transitions near zero voltage or current, reducing overlap energy, though conduction and other losses remain.
What helps static voltage sharing of series-connected SCRs?
A Series gate resistors only
B Parallel equalizing resistors
C Output capacitors only
D A larger load
Answer: B. Parallel equalizing resistors. Small resistors across series devices help equalize steady-state voltage sharing despite leakage-current differences.
What helps dynamic voltage sharing of series devices?
A Larger heat sinks
B Output fuses
C Current sensors only
D RC snubber networks
Answer: D. RC snubber networks. RC networks across series devices reduce transient voltage imbalance caused by unequal switching times.
What helps parallel power switches share current?
A Unequal bus lengths
B One shared gate only
C Higher output ripple
D Symmetric layout and matching
Answer: D. Symmetric layout and matching. Matched devices, low-inductance symmetric connections and suitable balancing improve current sharing.
Why is an open load risky for a current-source inverter?
A DC-link current vanishes safely
B All switches turn off instantly
C Output voltage stays zero
D DC-link voltage can rise
Answer: D. DC-link voltage can rise. A current-source inverter must maintain a path for DC-link current; opening the load can force a damaging voltage rise.
What is a dangerous VSI leg state?
A Both leg switches on
B Both leg switches off
C One diode conducting
D Load current flowing
Answer: A. Both leg switches on. Turning on both switches in one leg shorts the DC link through the devices, causing shoot-through current.
What controls power flow in a dual-active-bridge converter?
A Load resistance only
B Gate voltage polarity
C Bridge phase shift
D Transformer turns alone
Answer: C. Bridge phase shift. The phase shift between the two active bridges controls transferred power and can reverse its direction.
A device has Tc 70 °C, P 40 W, RθJC 0.5 °C/W. Find Tj.
A 75 °C
B 110 °C
C 90 °C
D 140 °C
Answer: C. 90 °C. Junction temperature is approximately case temperature plus power times junction-to-case thermal resistance: 70 plus 40 times 0.5 equals 90 °C.
A switch dissipates 100 W. Total thermal resistance to ambient is 0.6 °C/W; Ta is 40 °C. Find Tj.
A 60 °C
B 80 °C
C 140 °C
D 100 °C
Answer: D. 100 °C. The temperature rise is 100 W times 0.6 °C/W, or 60 °C; adding 40 °C ambient gives 100 °C.
For an ideal boost, what happens to Lcrit as fs rises?
A It increases linearly
B It decreases inversely
C It remains fixed
D It becomes negative
Answer: B. It decreases inversely. The boost critical inductance formula contains switching frequency in the denominator, so doubling frequency halves Lcrit at fixed operating point.
What does a boost PFC stage aim to make input current?
A Square and lagging
B Sinusoidal and in phase
C Constant and leading
D Zero at all times
Answer: B. Sinusoidal and in phase. A boost PFC controller shapes the input current to follow the line voltage, reducing harmonics and improving power factor.
How does reducing source inductance affect commutation overlap?
A It reduces overlap
B It increases overlap
C It removes firing control
D It doubles ripple frequency
Answer: A. It reduces overlap. Smaller source inductance allows current to transfer between phases more quickly, reducing overlap angle and voltage drop.
At fixed voltage and current, how does hard-switching loss scale with fs?
A Inversely proportional to fs
B Independent of fs
C Approximately proportional to fs
D Proportional to fs squared
Answer: C. Approximately proportional to fs. With transition energy roughly fixed per cycle, average switching loss grows approximately in proportion to switching frequency.
Why use a snubber with a power switch?
A Set output frequency
B Create load current
C Increase conduction drop
D Limit voltage and dv/dt
Answer: D. Limit voltage and dv/dt. A snubber shapes switching transients to limit voltage overshoot or dv/dt and can reduce device stress and EMI.